Analog-to-digital converters (ADC) are used to convert analog signals into a digital representation of the same signal. ADCs are used in a wide variety of applications, ranging from medical and entertainment to communications (both voice and data). There are two main types of ADCs, pulse-code modulated (PCM) ADCs and sigma-delta ADCs. PCM ADCs work by periodically sampling the signal to be converted and then quantizing each of the samples into a digital representation. Therefore, the signal to be converted initially becomes a discrete-time sample stream and then a digital bit stream. Sigma-delta ADCs, on the other hand, typically use single-bit quantizers (although, multi-bit sigma-delta ADCs exist) to convert an error function into a digital bit stream, rather than the signal to be converted. The error function is defined to be the difference between the signal to be converted and an analog version of the quantized output.
Sigma-delta ADCs are commonly used in applications where high resolution with low to moderate conversion rates are required. An advantage of sigma-delta ADCs over PCM ADCs is that the sigma-delta ADCs normally make use of single- or low multi-bit (two, three, or four bit) quantizers, making the precision requirements of the sigma-delta ADC much lower than the PCM ADCs which normally use quantizers with a large number of bits (eight or greater). An additional advantage of sigma-delta ADCs is that they can operate at frequencies that are typically much higher than the bandwidth of the signal they are converting. Operating at a frequency greater than the required frequency is commonly referred to as oversampling and an ADC that is operating at a frequency that is K times greater than the required frequency is referred to as a K-times oversampling ADC.
A difficulty encountered with the use of a typical implementation of a sigma-delta ADC operating at a high oversampling rate is the sampling of the signal to be converted, commonly referred to as an analog signal, so that a discrete-time sample stream with a high oversampling rate can be provided to the actual sigma-delta ADC for actual analog-to-digital conversion. Clock jitter (or variations from the expected clock frequency) is a common problem in sampling circuitry. A discrete-time sample stream with a significant amount of clock jitter, when converted into a digital data stream possesses a significant amount of noise, resulting in decreased performance of the overall system. Additionally, a typical sample-and-hold circuit (a circuit commonly used to provide samples) is prone to having non-deal properties that may place severe compromises on the quality of the sample stream that they provide. The typical sample-and-hold circuit can have problems with gain mismatch and offset, and timing mismatch.
A need has therefore arisen for a sigma-delta ADC with a direct sampling circuit or structure (or more simply, a sigma-delta mixer) that is capable of providing good samples of the analog signal at a very high sampling rate.